This invention relates to magnetic bubble memory structures of the type including redundancy data-containing areas thereon in addition to information data-containing storage sections to enable utilization of chips having one or more defective portions in the information data-containing storage section which are incapable of propagating and/or properly processing data therein as represented by a chain of magnetic bubbles and voids arranged in a predetermined sequence. More particularly, this invention concerns different embodiments of a magnetic bubble memory chip architecture in which the redundancy data contained thereon is stored in special redundancy storage loops corresponding to the plurality of bubble storage loops included in the information data-containing storage section of the chip, but having a relatively limited number of bit positions per redundancy storage loop as compared to the bit positions included in a respctive information data-containing storage loop.
Magnetic bubble memory structures typically include one or more memory storage loops, accommodating a plurality of magnetic single-walled domains or bubbles, each of which represents one bit of binary information. These bubbles may be rotated about individual memory storage loops in a synchronized and controlled manner such that access to the stored information imparted thereby can be gained. In one form of magnetic bubble memory circuit architecture generally known as the "block replicate" form, the chip is arranged with input and output sections with an intermediate bubble storage section being disposed between the input and output sections, such that data in the form of chains of bubbles and voids may be entered into the bubble storage section via the input section for subsequent readout when desired from the bubble storage section via the output section to a suitable bubble detector. The bubble storage section is organized as a plurality of information data-containing storage loops, wherein information in the form of a series of magnetic bubbles and voids respectively representing binary "1's" and "0's" may be transferred between the input section and each of the respective information data-containing storage loops and from the storage loops to the output section, thereby enabling information to be written into the memory and to be read out from the memory as desired.
The magnetic bubble memory chip comprises a substrate of non-magnetic material on which a planar film or layer or magnetic material capable of supporting magnetic bubbles is disposed. The magnetic bubbles are caused to travel along predetermined paths within the layer of bubble-supporting magnetic material by laying down a magnetizable bubble propagation path pattern on the layer of magnetic material as a series of thin film propagation elements of magnetically soft material, e.g. permalloy, in the form of tiny geometric shapes or circuit elements. In this respect, a magnetic drive field within the plane of the layer of magnetic material is rotated which causes the individual propagation elements included in the bubble propagation path pattern to be sequentially polarized in a cyclical sequence causing the individual bubbles to be propagated in a step-wise movement along the path as defined by the magnetizable propagation elements. One such overlay pattern commonly employed in a magnetic bubble memory chip is the so-called series of alternating T-shaped and bar-shaped permalloy elements. More recently, permalloy elements in the form of individual asymmetric chevrons have found favor as propagation path elements in magnetic bubble memory chip structures.
The planar film or layer of magnetic material capable of supporting magnetic bubbles as employed in these magnetic bubble memory structures has a magnetically easy direction essentially perpendicular to the plane of the structure. Magnetic properties such as magnetization anisotrophy, coercivity and mobility, are such that the device may be maintained magnetically saturated with magnetization in a direction out of the plane such that small localized single domain regions of magnetic polarization or magnetic bubbles aligned opposite to the general polarization direction may be supported. These localized magnetic domains or magnetic bubbles are generally cylindrical in configuration and may represent binary memory bits as "1's", with the absence of sch magnetic domains or magnetic bubbles referred to as "voids" representing "0's". Magnetic bubble memory structures offer increased density of data storage per unit area as compared to other types of memory structures, such as the so-called random access type memory, although providing serial readout with increased data access time. Although data retrieval with the random access type memory as defined by a matrix of semiconductor memory cells or magnetic cores enables any particular bit or word stored in the memory to be accesed in extremely fast time, this increased speed is accompanied with increased costs such that the cost per bit of stored information tends to be cheapest with the memory structures having the slowest data access time and most expensive with th memory structures offering the fastest data access time. Thus, magnetic bubble memory structures of large capacity storage even though requiring a relatively long time in data acquisition may offer cost economies as compared to random access memory structures of semiconductor memory cells or magnetic cores.
Although a magnetic bubble memory structure having the older major loop-minor loop circuit architecture or the more recent "block replicate" form offers certain economic and operational advantages (e.g. being of non-volatile character wherein a cessation of power does not automatically destroy the data information contained by the storage loops), every loop in every chip of the memory system must be perfect in order for the memory system to perform satisfactorily. Thus, without more, a defect in any one of the storage loops would require discarding the entire magnetic bubble memory chip. This defect factor has been recognized, and various techniques have been proposed in the art for permitting a magnetic bubble memory chip having one or more storage loops of a defective character to be used.
U.S. Pat. No. 3,792,450 Bogar et al issued Feb. 12, 1974 discloses one such technique for identifying and isolating defective storage loops on a magnetic bubble memory chip so as to enable the magnetic bubble memory chip to be used by controlling information storage in a manner avoiding the use of the defective storage loop(s). In U.S. Pat. No. 3,792,450 Bogar et al, a separate control loop is provided on the chip in addition to the plurality of storage loops, with the data information regarding defective storage loops being stored in the control loop. This data information is used to control the subsequent transfer of data information into the plurality of storage loops so that no data information is transferred into those areas of the storage loops which earlier were unable to completely pass magnetic bubbles therethrough. The synchronization and redundancy data as provided for on the magnetic bubble memory chip of U.S. Pat. No. 3,792,450 Bogar et al is effectively limited to use with a chip architecture of the major loop-minor loop type and would not be readily modified for use in a block replicate chip architecture. In this respect, the magnetic bubble memory chip as disclosed in U.S. Pat. No. 3,792,450 Bogar et al requires the use of three separate minor loops, two such loops for synchronization and a separate loop (i.e., the control loop) for redundancy.
Another such redundancy technique is described, for example, in U.S. Pat. No. 3,909,810 Naden et al issued Sept. 30, 1975, wherein a separate magnetic bubble flag chip is employed to store the locations of defective storage loops on the actual magnetic bubble memory chip. Other techniques include that described in U.S. Pat. No. 4,070,651 Naden issued Jan. 24, 1978, wherein a non-volatile semiconductor memory, such as a programmable read-only-memory, is employed to store redundancy data identifying the relative positions of defective storage loops to each other. This redundancy data is used to control logic so that a stream of magnetic bubbles to be transferred into the loops for storage, for example, contains intermittent voids corresponding to defective storage loop locations. A refinement of the latter technique is disclosed in pending U.S. Patent application, Ser. No. 752,947, filed Dec. 17, 1976 which provides for the redundancy data to be stored in an erasable non-volatile semiconductor memory to facilitate magnetic bubble data chip replacement without requiring the replacement of the entire array of redundancy data for all of the data chips included within a magnetic bubble memory system.
Whenever it is desired to access storage data from a magnetic bubble memory system, the precise location of any specific data stored within the plurality of storage loops must be known at this particular time. Thus, it is necessary to know when the input or output absolute address in the storage loops and the page address in the storage loops containing the desired data to be accessed coincide. In this respect, each storage loop contains a plurality of bit positions capable of supporting and storing magnetic bubbles as binary "1's" as well as having voids, binary "0's" stored therein, with these respective bit positions being the absolute addresses of each storage loop. However, the processing of data in a magnetic bubble memory system requires the movement of individual magnetic bubbles through each of the bit positions of the respective storage loops, with each magnetic bubble or void having a page address in relation to the corresponding bit positions of the remaining storage loops which is retained by the data as data propagation occurs through each absolute address. Thus, some form of synchronization technique is required for coordinating the specific bit positions of the plurality of storage loops to enable a user to ask for and access a specific portion of data. The user must determine the absolute address of the beginning bit position of the data stream desired to be accessed so that the appropriate page of data extending across corresponding bit positions in the plurality of storage loops can be advanced to the appropriate absolute address for transfer out of the storage loops for readout by an appropriate detector.